The current trend in electronic package assembly design, particularly for those assemblies utilized in the computer field, is to provide a high density, high wirability, and highly reliable assembly that provides both the connection and the interconnection of circuit devices which form important parts of the computer. High density and high wirability are essential for such an assembly to provide the necessary performance for a given function in a minimal amount of space. High reliability is essential due to potential end product failure, should vital misconnections of these devices occur. Further, to assure effective repair, upgrade, and/or replacement of various components of the system (i.e., connectors, integrated circuits (chips), boards, modules, etc.), it is also highly desired that such assemblies be separable and reconnectable in the field within the final product, as well as tolerant of dust and fibrous debris. Such a capability is also desirable during the manufacturing process for such products, e.g., to facilitate testing.
Other methods of performing similar types of functions are presently available but have limitations in functionality, performance, and/or price. In one such example, the substrate is a typical printed circuit board made of fiberglass reinforced epoxy resin. Because the pins used to plug the package assembly into a mating socket are directly attached through the substrate (typically by means of a pinning process), many compromises must be made. For example, since the pins protrude through the top surface of the substrate, most of the electronic and mechanical components must be located within the boundaries formed by the rows of pins around the perimeter of the package assembly. The wirability of the substrate is compromised due to the relatively large diameter of plated-through holes needed for the pins. This blocks a significant number of the potential wiring channels. Furthermore, a design requiring a full array of pins (no depopulation to form just a perimeter array of pins) would be extremely difficult to do because the protruding pins would interfere with the placement of all but the smallest of components on the top surface. A package application may desire a full array of pins for many reasons, including the need for more external connections, the desire to minimize the space used by the package assembly, and the desire to improve performance by having a signal or power connection exit directly down to the printed circuit structure, as opposed to having it fan out to the perimeter on the substrate and then exit down to the printed circuit structure.
Examples of a second method of performing a similar function involve the use of a substrate which consists of a known material such as alumina or glass-ceramic and typically has only one or two wiring layers, which are on the same side as the components. The limitations of this type of carrier compared to the disclosed invention are higher cost, limited wirability (for the same reasons as in the previous example), the inability to support a full area array of pins, and the fact that it is difficult for such glass or ceramic-based carriers to support the use of pin-in-hole components.
Examples of a third method of performing the above function involve the use of a substrate which also consists of a material such as alumina or glass-ceramic but usually has multiple wiring layers. This type of structure is also known as a multilayer ceramic module. This type of structure overcomes the limitation of limited wirability since it has both multiple wiring layers as well as individually-attached pins used for the connector means. The pins are attached (typically brazed) to (as opposed to extending through) the bottom of the substrate. But, the above limitations, including primarily the difficulty of this material to effectively support the use of pin-in-hole components and a significantly higher cost (especially for sizes greater than 40 millimeters) remain.
Attention is directed to U.S. Pat. Nos. 5,036,431, 5,155,905 and 5,010,445 for various techniques for providing a package assembly for connecting and interconnecting a variety of electronic components to an electrical circuit member. As understood from a reading of these patents, the techniques described therein include many of the aforedefined disadvantages, e.g., limited wirability, inability to support a full area array of pins, the inability to support the use of pin-in-hole components, as well as others, e.g., relatively complex design, costly to manufacture, etc.
In U.S. Pat. No. 5,248,262, issued Sep. 28, 1993, and entitled "High Density Connector" (inventors: R. A. Busacco et al.), there is defined an electrical connector with electrical contacts, including those combining flexible circuitry and an associated spring means, adapted for use as part of one embodiment of the invention. U.S. Pat. No. 5,248,262, assigned to the same assignee as the present invention, is incorporated herein by reference.
It is believed that a package assembly capable of effectively and reliably connecting active as well as passive electronic components to an electrical circuit member, wherein such connections are repeatable (such that connection and reconnection can readily occur), and which provides the other advantageous features discernible from the following description would constitute a significant advancement in the art.